UART interfacing with LPC2148

UART:

 It is simple way to communicate between computer and micro controller. UART (Universal Asynchronous Receiver/Transmitter) is a serial communication protocol in which data is transferred serially bit by bit at a time.  In Asynchronous serial communication, a byte of data is transferred at a time. The data transmission frames contain START bit, Data and STOP bit.
1) START bit: It is a bit with which indicates that serial communication has started and it is always low.

2) STOP bit:  It is sent after data bits packet to indicate the end of frame. Stop bit is always logic high.
 
 LPC2148  has two UART port, UART0 and UART1.
 UART pins is shown in below:

UART pins

UART0 is selected as:
PINSEL0=0x00000005;

UART1 is selected as:

PINSEL0=0x00050000; 

As given below UART register.

UART Register

FIFO Control register:

FIFO Control Register

Bit 0: FIFO ENABLE

If bit is '0' then FIFO is disable.

If bit is '1' then FIFO is enable for Rx and Tx.

Bit 1: Rx_FIFO RESET: This is used to clear 16 byte of  Rx_FIFO.

If bit is '0' then no effect.

If bit is '1' then Clear 16 byte Rx-FIFO and reset Rx-FIFO pointer.

Bit 2: Tx_FIFO RESET: This is used to clear 16 byte of  Tx_FIFO.

If bit is '0' then no effect.

If bit is '1' then Clear 16 byte Tx-FIFO and reset Tx-FIFO pointer.

Bit 7-6 : Rx_trigger :  This bit is used to select the number of bytes of the receiver data to be written so as to enable the interrupt/DMA.
00-- Trigger level 0 (1 character or 0x01)
01-- Trigger level 1 (4 characters or 0x04)
10-- Trigger level 2 (8 characters or 0x08)
11-- Trigger level 3 (14 characters or 0x0E)

Line Control Register (UxLCR) :

 It is 8 bit register. It determines the format of the data character that is to be transmitted or received.

Line Control Register

Bit 1:0 – WLS : Word Length Select

These two bits are used to select the character length
00-- 5-bit character length
01-- 6-bit character length
10-- 7-bit character length
11-- 8-bit character length

Bit 2 – Stop Bit Selection:

This bit is used to select the number(1/2) of stop bits
0-- 1 Stop bit
1-- 2 Stop Bits

Bit 3 – Parity Enable:
This bit is used to Enable or Disable the Parity generation and checking.
0-- Disable parity generation and checking.
1-- Enable parity generation and checking

Bit 5:4 – Parity Selection:
These two bits will be used to select the type of parity.
00-- Odd parity. Number of 1s in the transmitted character and the attached parity bit will be odd.
01-- Even Parity. Number of 1s in the transmitted character and the attached parity bit will be even.
10-- Forced "1" stick parity.
11-- Forced "0" stick parity

Bit 6 – Break Control
0-- Disable break transmission.
1-- Enable break transmission. Output pin UARTn TXD is forced to logic 0

Bit 7 – DLAB: Divisor Latch Access Bit
This bit is used to enable the access to divisor latch.
0-- Disable access to divisor latch
1-- Enable access to divisor latch

Line Status Register (UxLSR) :

It is 8 bit register. The Line Status Register gives us the information about the RX and TX blocks in UART.

Line Status Register

Bit 0 – RDR: Receive Data Ready
This bit will be set when there is a received data in RBR register. This bit will be automatically cleared when RBR is empty.
0-- The UARTn receiver FIFO is empty.
1-- The UARTn receiver FIFO is not empty.

Bit 1 – OE: Overrun Error
The overrun error condition is set when the UART Rx FIFO is full and a new character is received. In this case, the UART0/1  RBR FIFO will not be overwritten and the character in the UART0/1 RSR will be lost.
0-- No overrun
1-- Buffer over run

Bit 2 – PE: Parity Error
This bit is set when the receiver detects a error in the Parity.
0-- No Parity Error
1-- Parity Error

Bit 3 – FE: Framing Error
This bit is set when there is error in the STOP bit(LOGIC 0)
0-- No Framing Error
1-- Framing Error

Bit 4 – BI: Break Interrupt
This bit is set when the RXDn is held in the spacing state (all zeroes) for one full character transmission
0-- No Break interrupt
1-- Break Interrupt detected

.

Bit 5 – THRE: Transmitter Holding Register Empty
THRE is set immediately upon detection of an empty THR. It is automatically cleared when the THR is written.
1-- THR register is Empty
0-- THR has valid data to be transmitted

Bit 6 – TEMT: Transmitter Empty
TEMT is set when both UnTHR and UnTSR are empty; TEMT is cleared when any of them contain valid data.
0-- THR and/or the TSR contains valid data.
1-- THR and the TSR are empty.

Bit 7 – RXFE: Error in Rx FIFO
This bit is set when the received data is affected by Framing Error/Parity Error/Break Error.
0-- RBR contains no UARTn RX errors.
1-- RBR contains at least one RX errors.

Transmitter Enables Register :

Transmitter Enable Register

Bit 7 – TXEN: Transmitter Enable
When this bit is 1, the data written to the THR is output on the TXD pin.
If this bit is cleared to 0 while a character is being sent, the transmission of that character is completed, but no further characters are sent until this bit is set again. In other words, a 0 in this bit blocks the transfer of characters.

Baud Rate Calculation:

Baud Rate Calculation

Interfacing Diagram:

Interfacing Diagram

Steps for UART communication :

1. Configure the GPIO pin for UART0 function using PINSEL register. 
2. Configure the FCR for enabling the FIXO and Reste both the Rx/Tx FIFO. 
3. Configure LCR for 8-data bits, 1 Stop bit, Disable Parity and Enable DLAB. 
4. Calculate the DLM, DLL values for required baudrate from PCLK. 
5. Update the DLM, DLL with the calculated values. 
6. Finally clear DLAB to disable the access to DLM, DLL. 

Code:

/**************************************************************************************************
Expt. 4.: UART interfacing with to LPC2148
Platform:  LPC2148 Development Board.
College: PICT

Hardware Setup:-
 UART pins: P0.0 & P0.1         
********************************************************************************/

  #include<lpc214x.h>

void uart0Init(void)       

{

    PINSEL0=0x00000005;// port 0 tx P0.0 and rx P0.1 selected

    U0LCR=0x83; //8bit data, no parity, 1 stop bit

    U0DLL=97;// 9600 baud rate @15Mhz Pclk

    U0LCR=0x03;// DLAB=0

   

}

void uart0Putch(unsigned char ch)

{

    U0THR=ch;    // Transmitter holding register

    while(!(U0LSR & 0x20));// wait still THR=0 

}

unsigned char uart0Getch(void)

{

    while(!(U0LSR & 0x01)); //RDR=0 then FIFO is empty then only this will rx character

    return(U0RBR);  // return this data

}

int main()

{

    unsigned char a;

    uart0Init();

    while(1)

    {

        a=uart0Getch();

        uart0Putch(a);

    }

    return 0;

}

/**************************************************************************************************
Expt. 4.1: UART interfacing with to LPC2148
Platform:  LPC2148 Development Board.
College: PICT

Hardware Setup:-
 UART pins: P0.0 & P0.1         
********************************************************************************/

#include<lpc214x.h>

unsigned char rx_array[];
void uart0Init(void)     
{
    PINSEL0=0x00000005;// port 0 tx P0.1 and rx P0.0 selected
    U0LCR=0x83; //8bit data, no parity, 1 stop bit
    U0DLL=97;// 9600 baud rate @15Mhz Pclk
    U0LCR=0x03;// DLAB=0
 
}
void uart0Putch(unsigned char ch)
{
    U0THR=ch;    // Transmitter holding register
    while(!(U0LSR & 0x20));// wait still THR=0
}
unsigned char uart0Getch(void)
{
    while(!(U0LSR & 0x01)); //RDR=0 then FIFO is empty then only this will rx character
    return(U0RBR);  // return this data
}
void UART0_Txstring(unsigned char *Str)
{
int i=0;
while(Str[i]!='\0')
 {
   uart0Putch(Str[i]);
   i++;
 }
}


int main()
{    unsigned char var1[]={ "\r\n welcome\r\n"};
    unsigned char var2[]={ "\r\n PICT\r\n"};
    unsigned char i;
    uart0Init();
 
    UART0_Txstring(var1);
    UART0_Txstring(var2);
    for(i=0;i<10;i++)
    {
       rx_array[i]=uart0Getch();
    }
      rx_array[10]='\0';
      UART0_Txstring(rx_array);

    return 0;
}